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How To Improve Silicon Wafer Process Technology?
- Nov 14, 2018 -
The shrink of device pitch follows Moor’s Law. As the device density increases, the demand for higher substrate quality, better wafer site flatness and higher purity wafer surface, is also increasing with time. YISEMI endeavors to improve wafer product quality as well as crystal growth technology, and the key factors involved in the wafering technology development are listed in the following:.

Technology of Wafer Stress Control

The warp represents the distribution of stress on the wafer. Its variation is well contained within 10um (Cpk> 1.33) in YISEMI through proper control of the run times of wire guide, the control of slurry quality and other slicing process parameters to meet the stress requirement in subsequent wafering processes.

Technology for Shape of Edge Profiling and Roughness Control

YISEMI has extensive experience on wafer edge grinding. Various design selections of edge profiles are available to meet different customer’s demands. Also, we co-work with customers to develop special edge profiles. Besides, Wafer Works has developed helical process, a solution for special and strict specification of edge condition, and can greatly improve both the edge profile and edge roughness.

Extrinsic Gettering Technology

YISEMI is capable of depositing single (or multiple) poly crystalline thin film layers on silicon wafer to enhance extrinsic gettering capability of Si wafer and adjust wafer warps.

Polishing Technology

The technology of wafer polishing has always been improving in YISEMI to satisfy the arising demand from customers for superior quality of wafer surfaces. The unrelenting demand of improved TTV and STIR, which is becoming more critical on the products of deep sub-micron generation, is accomplished through the advancement of polishing technology and the introduction of new polishing equipment in YISEMI.